Silicon wafers are the basic raw material from which transistors, integrated circuits, memory chips, microprocessors and various other semiconductor devices are made, for use in electronics, familiar to us in everyday use. Wafers are made from ultra pure silicon, crystallized by the Czochralski or Float Zone methods, into single crystal ingots. These ingots are sliced into thin wafers, then lapped, etched, polished and cleaned, to become the purest, flattest, smoothest and cleanest objects possible. Only such perfections can yields the billions of submicroscopic transistors that make up modern semiconductor devices.

Silicon (at 27%) is the second most abundant element in earth's crust (after oxygen). It is never found as the elemental silicon, but as the compound SiO2. It is the main constituent of sand and many rocks.

Semiconductor applications of silicon require extraction and purification of this element to level of ~99.9999999% (9N).
It takes the following three energy-consuming steps:

Silicon ingots are made in various sizes (commonly in nominal diameters of 1", 2", 3", 100mm, 125mm, 150mm, 200mm, 300mm and 450mm). They are either CZ or FZ crystallized. Ingot crystallographic orientations are usually (100) or (111) and sometimes (110) or (211). Silicon ingots are doped with Boron (B) to have p-type resistivity of anywhere from 0.001 to 10,000 Ohmcm {most commonly (1-10)}. To have n-type resistivity Silicon is doped with Phosphorus. Resistivities from 0.001 to 10,000 Ohmcm are possible, but resistivities below 0.1 Ohmcm require certain safety precautions in manufacture. Antimony (Sb) is used to dope Silicon to n-type (0.008-0.020)Ohmcm and Arsenic (As) to dope Silicon to n-type (0.001-0.005)Ohmcm. Undoped (intrinsic) Silicon ingots can have resistivity > 20,000 Ohmcm and then type is indeterminate. CZ crystallized Silicon ingots Boron doped to (0.1-100)Ohmcm range, have to be heat treated (quenched) after crystallization to eliminate Boron-Oxygen complexes that grow during slow cooling. This is done routinely for ingots not more than 4"Ø. Such material more than 4"Ø, has to be heat treated as wafers after slicing, since large ingots cannot be cooled fast enough. All electronic properties of Silicon wafers are determined in the manufacture of ingots. Wafer manufacture affects only the geometric properties and crystallographic parameters of wafers. Silicon ingots are made into Silicon wafers in the following precision major manufacturing steps (more details are in this picture):

The term epitaxy comes from the ancient Greek roots epi (ἐπί), meaning „above”and taxis (τάξις), meaning „an ordered manner”. It can be translated as "arranging upon". For most technological applications, it is desired that the deposited material form a crystalline overlayer that has one well-defined orientation with respect to the substrate crystal structure (single-domain epitaxy). Chemical vapor deposition (CVD) is a key technology used to produce high quality, high-performance, solid materials. The process is used in the semiconductor industry to produce thin films. In typical CVD, the wafer (substrate) is exposed to one or more volatile precursors, which react and/or decompose on the substrate surface to produce the desired deposit. Frequently, volatile by-products are also produced, which are removed by gas flow through the reaction chamber.

Silicon, Si - the most common semiconductor, single crystal Si can be processed into wafers up to 450 mm in diameter. Wafers are thin (thickness depends on wafer diameter, but is typically less than 1 mm), circular slice of single-crystal semiconductor material cut from the ingot of single crystal semiconductor. All lattice planes and lattice directions are described by a mathematical description known as a Miller Index. In the cubic lattice system, the direction [hkl] defines a vector direction normal to surface of a particular plane or facet. A crystal can always be divided into a fundamental shape with a characteristic shape, volume, and contents.

As a crystal is periodic, there exist families of equivalent directions and planes. Notation allows for distinction between a specific direction or plane and families of such. Miller convention:

• Use the [ ] notation to identify a specific direction,
• Use the < > notation to identify a family of equivalent directions,
• Use the ( ) notation to identify a specific plane,
• Use the { } notation to identify a family of equivalent planes.

Please note:

• To calculate Resistivity, choose Dopant and enter/modify Dopant Density in the Dopant Density field; the Calculator will compute Type, Resistivity and Mobility in corresponding columns.
• To calculate Dopant Density, choose Dopant and enter/modify Resistivity.
• Concentration and Mobility are always computed; they cannot be entered/modified. Likewise type is a consequence of the Dopant chosen.

1. Danilo Crippa, Daniel L. Rode, Maurizion Masi [Silicon Epitaxy], Academic Press 2001
2. Robert Hull [Properties of Crystalline Silicon], INSPEC 1999
3. A. Kelly, G.W. Groves [Crystallography and crystal defects], PWN 1980
4. П.С. Кириеев [Физика полупроводников], Высшая школа 1969
5. Arjan Ciftja, Thorvald Abel Engh, Merete Tangstad [Refining and Recycling of Silicon: A Review], Norwegian University of Science and Technology 2008
6. Tadeusz Penkala [Zarys krystalografii], PWN 1977
7. On-line materials from: Bernreuter Research, Green Rhino Energy
8. Semiconductor Nanotechnology: Advances in Information and Energy Processing and Storage - Nanostructure Science and Technology
   Stephen M. Goodnick (editor), Anatoli Korkin (editor), Robert Nemanich (editor), Springer Nature Switzerland AG 2018